This invention relates to electronics, in general, and more particularly to methods of manufacturing semiconductor components and semiconductor components thereof.
High frequency, high current capacitors are often combined or integrated with other circuitry on a single semiconductor chip. These integrated high frequency, high current capacitors are needed for applications in digital cellular telephones, cellular telephone base stations, and radio frequency power amplifiers. These capacitors in the integrated circuit are made of a capacitor dielectric layer located between top and bottom capacitor electrodes.
A first or bottom layer of interconnect in the integrated circuit is commonly referred to as a xe2x80x9cmetal 1xe2x80x9d layer. A portion of the metal 1 layer is commonly used as the bottom capacitor electrode. The top electrode for the integrated capacitor, however, is not formed from the next interconnect layer, or the xe2x80x9cmetal 2xe2x80x9d layer. Instead, a separate metal layer is formed to provide the top capacitor electrode. This additional metal layer increases the cost and complexity of the manufacturing process for the integrated circuit. The bottom capacitor electrode can be made of aluminum, copper, gold, or the like, and the top capacitor electrode can be made of aluminum, copper, gold, or the like.
A dielectric layer is formed between the metal 1 and metal 2 layers. This interlayer dielectric, however, is not used as the capacitor dielectric layer. Instead, at least one separate dielectric layer is formed to provide the capacitor dielectric layer. The additional dielectric layer further increases the cost and complexity of the manufacturing process. The capacitor dielectric layer can be made of silicon nitride or an oxide such as silicon dioxide, Tetra-Ethyl-Ortho-Silicate (TEOS), or tantalum oxide. The capacitor dielectric layer can also be made of a combination of a silicon nitride layer and one or more oxide layers.
An example of a specific process used to form the top capacitor electrode includes using a photoresist lift-off process to define the top capacitor electrode. This lift-off process suffers from the problem of the top capacitor electrode having a limited thickness. The thickness of the top capacitor electrode must be increased to make the integrated capacitor compatible with high current applications. Accordingly, a plating process is often added to increase the thickness of the top capacitor electrode. The plating process requires the use of an additional photoresist mask. Therefore, this top capacitor electrode formation process requires the use of two photoresist masks: one for the plating process and one for the lift-off process. These two additional photoresist masks increase the cost and complexity of the manufacturing process.
An example of a second process used to form the top capacitor electrode includes using a via etch process where the integrated capacitor is formed within a via. The via is formed or etched into a thick dielectric layer located over the bottom capacitor electrode. The etching process for the via is time-consuming and complicated because of the large thickness of the dielectric layer. A first photoresist mask is required to define the via in the thick dielectric layer. Next, the capacitor dielectric layer is formed in the via, and then the top capacitor electrode is formed using a plating process. A second photoresist mask is required to define the plated top capacitor electrode. Therefore, this top capacitor electrode formation process also requires two additional photoresist masks, which increase the cost and complexity of the manufacturing process. An additional problem of this top capacitor electrode formation process includes undesired electrical shorting between the top and bottom capacitor electrodes. This electrical shorting occurs within the via due to poor step coverage of the capacitor dielectric layer within the via.
Accordingly, a need exists for a method of manufacturing a semiconductor component and semiconductor component thereof where the semiconductor component has a high frequency, high current capacitor combined with additional circuitry on a single semiconductor chip. The addition of the integrated capacitor should not significantly increase the cost or complexity of the manufacturing process of the integrated circuit.